This data can be either a 0 or a 1 and will be shifted to the right on each rising edge of the clock pulse. This shift register is configured to shift data from the left to the right.ĭata is fed into the D input of the first flip-flop on the left. This is a four bit shift register and therefore consists of four D flip-flops. Shift registers consist of D flip-flops as shown in the figure below. A shift register has the capability of shifting the data stored in the register from left to right or right to left. Shift Register OperationĪ register stores data i.e. Two different ways to code a shift register in VHDL are shown.

A shift register is written in VHDL and implemented on a Xilinx CPLD.